PnR using INNOVUS with scripts

In the previous tutorials, we have seen how to use Cadence INNOVUS GUI for placement and routing. But INNOVUS tool works better when used with scripts. It is convenient to use the script based placement and routing as numerous runs are needed to successfully verify an IC. This is also the industrial practice. In this […]

Placement and Routing using INNOVUS

In the previous three tutorials, we have learned how prepare the files which are needed to start the placement and routing using INNOVUS. In this tutorial, a basic tutorial on how to perform placement and routing using INNOVUS is given. This is a very fundamental and only covers the basic ideas and follows the tutorial […]

I/O file setup for PnR using INNOVUS

In the previous tutorial on Placement And Routing For ASIC, we have seen that one I/O file is also important.  This tutorial is on I/O file setup for PnR using INNOVUS.  An I/O file is for custom arrangement of I/O pins and I/O pads. This file is optional if the final sign-off analysis is not […]

Touch Free Automatic Hand Sanitizer Dispenser Machine

This is a difficult time for everyone now due to the COVID-19 pandemic. The disease COVID-19 is due to the novel CORONA Virus which highly contagious. There is a world wide search is going on for right vaccine. Till the discovery of the right Vaccine the only way to fight against COVID-19 is to wear […]

MMMC file setup for PnR using INNOVUS

In the previous tutorial on Placement and Routing using INNOVUS, we have seen how to open the tool and how to import all the files. In this tutorial, we will discuss how to prepare view definition file by performing Multi Mode Multi Corner (MMMC) analysis. MMMC analysis is very important to perform, so that the […]

Importing Files for PnR using INNOVUS

In the previous tutorial, we have presented a basic tutorial on Placement and Routing for ASIC. This tutorial is the first step towards Placement and Routing using INNOVUS tool. We will cover very basics of Placement and Routing using INNOVUS as it is a huge area and many tutorials are available on internet. Here, we […]

Static Timing Analysis using Cadence Tempus

In the previous tutorials, we have discussed how to simulate or synthesize a design using Synopsys or Cadence. Static Timing Analysis is a very important step in designing an digital design for ASIC. This tutorial is on performing Static Timing Analysis using Cadence Tempus. 1. Open the terminal 2.   Source the cadence.cshrc 3.   In this […]

Power Analysis using Synopsys

In the previous tutorials, simulation and synthesis of digital circuits are described. This tutorial is on Power Analysis using Synopsys. Here, dynamic power consumption of a sequential circuit is estimated. 1.   Open the terminal 2.   Source the synopsys.cshrc 3.   In this experiment, we perform power analysis (dynamic power) of the design using power compiler. 4.  […]

ATPG for Sequential circuits

Automatic Test Pattern Generation and Automatic Test Pattern Generator (ATPG) is an electronic design automation method/technology used to find an input (or test) sequence that, when applied to a digital circuit, enables automatic test equipment to distinguish between the correct circuit behavior and the faulty circuit behavior caused by defects. Earlier we presented a tutorial on ATPG for Combinational Circuits. This tutorial focuses on ATPG for sequential circuits […]