State Partition Method for State Minimization

State Partition Method for State Minimization is also powerful as the Implication Chart Method and better than Row Equivalence method. In this technique, the states are partitioned into groups based on the possibility that they can be combined. Lets consider the example state table as shown in Table 1 for state minimization using state partition… Read More »

Implication Chart Method for State Minimization

Implication Chart Method for State Minimization is very popular for reducing the steps of an FSM and it is more machine friendly method than Row Equivalence Technique. In this method, a chart is prepared to find the equivalent steps. The implication chart is shown in Figure 1. States are written along the x-axis as ,… Read More »

Row Equivalence Method for State Minimization

Row Equivalence Method for State Minimization is a very simple technique to reduce number of states of an FSM. In the row equivalence method, it is checked that rows of a state table are equivalent or not. Here, a comparatively strict definition of state equivalence is used. The conditions for two states and to be… Read More »

State Minimization Techniques for FSM

In the previous post FSM Design, we have discussed design of Mealy and Moore state machines using Verilog. State minimization is important if we want to reduce number of states in a complex FSM which has many redundant states. If the number of states are reduced then number of bits required for state assignment will… Read More »

Multiplication using Look Up Tables

In the previous tutorials, many techniques are discussed for multiplication operation. An alternative way of computing multiplication is using look up tables. Multiplication using look up tables can be useful where serial multiplication is needed or memory devices are available like in FPGA device. This technique is based on the following popular algebraic equation  … Read More »

Signed Array Multiplier

In the previous tutorials, a scheme of Unsigned Array Multiplier is discussed. Unsigned Array Multiplier may be useful when we are concerned only about unsigned numbers. But in majority of digital systems, operands can be signed or unsigned and thus a dedicated signed array multiplier is needed. This signed array multiplier can perform multiplication for… Read More »

Sorting Processor Design to Sort a Serial Stream

Till now the sorting architectures discussed are based on the accessing of data elements in parallel. In real time situation the data streams are serial and serial to parallel conversion is costly as well as time consuming. On the other hand, parallel sorting architectures are very costly in terms of comparators. Thus alternate sorting architectures… Read More »

FPGA Implementation Median Filter for De-Noising

In this tutorial, we will discuss FPGA implementation of a Median filter which is used for removing noises from an image. Noises in an image can be of various types like salt and pepper noise, Gaussian noise, periodic noise etc [1]. Out of these noises, salt and pepper noise is a very basic type of… Read More »

Clock Division by Non-Integers

Previously we have discussed clock division by odd and even numbers in the tutorial sequential circuits. Later we have also developed a programmable clock divider that divides clock frequency by any integer from 1 to 15. This tutorial talks about clock division by non-integers which is also required is some critical digital systems. Clock division… Read More »

PnR using INNOVUS with scripts

In the previous tutorials, we have seen how to use Cadence INNOVUS GUI for placement and routing. But INNOVUS tool works better when used with scripts. It is convenient to use the script based placement and routing as numerous runs are needed to successfully verify an IC. This is also the industrial practice. In this… Read More »

Placement and Routing using INNOVUS

In the previous three tutorials, we have learned how prepare the files which are needed to start the placement and routing using INNOVUS. In this tutorial, a basic tutorial on how to perform placement and routing using INNOVUS is given. This is a very fundamental and only covers the basic ideas and follows the tutorial… Read More »

MMMC file setup for PnR using INNOVUS

In the previous tutorial on Placement and Routing using INNOVUS, we have seen how to open the tool and how to import all the files. In this tutorial, we will discuss how to prepare view definition file by performing Multi Mode Multi Corner (MMMC) analysis. MMMC analysis is very important to perform, so that the… Read More »

Importing Files for PnR using INNOVUS

In the previous tutorial, we have presented a basic tutorial on Placement and Routing for ASIC. This tutorial is the first step towards Placement and Routing using INNOVUS tool. We will cover very basics of Placement and Routing using INNOVUS as it is a huge area and many tutorials are available on internet. Here, we… Read More »