Intellectual Property Related
Tutorials and books on Digital VLSI Design:-
- Aspects of Hardware Description (1704 downloads) : by CEERI Pilani
- C-MOS, Digital Integrated Circuits (1559 downloads) : Sung Mo Kang and Yusuf Leblebici.
- C-MOS VLSI design, a circuits and system perspective (1587 downloads) : by Weste and Harris
- VLSI Signal processing Systems by Keshab K. Parhi (1116 downloads)
Important Books on digital system design and Verilog HDL:-
- A Verilog HDL primer (1682 downloads) : A very good book in learning Verilog.
- Verilog: Frequently Asked Questions (1792 downloads) : A Springer Publication
- Digital Design with introduction to Verilog (1341 downloads) : by Morris Mano
- Fundamentals of Digital Logic with Verilog (1599 downloads) : by Stephen Brown.
- Digital System Design using VHDL (1436 downloads) : by Charles H. Roth
Verilog Source Codes:-
- mux_tutorial: Mux realized in different programming styles of Verilog HDL.
- Combinational Circuits: Various Combinational circuits are realized in Verilog.
- Sequential Circuits: Various Sequential circuits are realized in Verilog.
- Memory Design: Verilog codes for memory blocks.
- System Architectures: Verilog codes for the various type of system architectures.
- FSM design: Verilog Codes for some FSM design examples
- Matlab Code to Convert from Real Floating Matlab Data to Fixed Binary Unsigned Equivalent (655 downloads) : To convert any floating data from Matlab to a fixed point binary equivalent in unsigned radix.
- Matlab Function to Convert to Float Data from Binary Decimal Data (564 downloads) : To convert any data that came from FPGA to real data to compare with Matlab results.
- Matlab code to Convert Binary Unsigned data to Hexadecimal Data (813 downloads) : To convert any binary unsigned decimal data to hexadecimal data o load to FPGA. Floating data also can be directly converted to Hex data.
- DCT Implementation in Matlab Without Function (743 downloads) : Implementation of DCT without Matlab inbuilt function which helps easy hardware implementation.
- Pre-Emphasis Filter Design using Verilog (718 downloads) : Test Design files where a pre-emphasis filter is implemented using Verilog in Vivado.