Finite State Machines Welcome to your QUIZ on Finite State Machines Your Name Please Enter Your Email 1. The output of a Moore FSM is function of All present states of the machine All the inputs A few combination of inputs and the present states All the combination of inputs and the present states None 2. In order to design a FSM based 1011 sequence detector, minimum number of flip-flops required 4 3 2 1 None 3. The output of a Mealy FSM is function of All present states of the machine All the inputs A particular combination of all the inputs and the present states All the combination of inputs and the present states None 4. Arrange the steps of designing a FSM based system in correct order. State Diagram Formation of State Table State Assignments Finding of Expressions using K-Map 1-3-2-4 1-2-3-4 1-3-4-2 2-3-1-4 None 5. Which one of the following is very frequently used to assign the states of FSMs to reduce power? Gray Code Pure Binary Code Excess 3 Code 8421 code None 6. The following figure is of which type of FSM and how many flip-flops will require to implement the counter? Mealy Machine, 2 Mealy Machine, 3 Moore Machine, 2 Moore Machine, 3 None 7. If the input to the following figure is '10011011' then output is (Bit stream is input to the machine from the LSB side. ) 01100101 11100101 01100111 01100100 None 8. The following state diagram is of Negative edge detector Positive Level Detector 1's Detector Positive edge detector None 9. The following figure is state diagram for serial implementation of 1's Complement 2's Complement Signed Representation None of the above None 10. The following state diagram is of 1's detector 0's detector Positive Edge detector Negative Edge Detector None 11. The following state diagram is of Mod-4 Counter Mod-3 Counter Enable based Gray counter None of the above None 12. Present state is '11'. Now if the input is 0 for three clock cycles then the state transitions are 10-11-10 00-01-10 00-11-00 None of the above None 13. The state diagram shown below is to detect the 1010 sequence in non-overlapping style 1010 sequence in overlapping style 0101 sequence in non-overlapping style 0101 sequence in overlapping style None 14. The below shown state diagram detects which sequence 1010 sequence in non-overlapping style 0101 sequence in non-overlapping style 1010 sequence in overlapping style 0101 sequence in overlapping style None 15. Following implementation is of which type of FSMs Moore Machine Mealy machine None 16. Following data path is of which type of FSMs Mealy Machine Moore Machine None of the above None 17. The state diagram is to detect the sequence 1010 in non-overlapping style 10101 in non-overlapping style 1010 in overlapping style 0101 in non-overlapping style None 18. The below shown state diagram is for 0101 sequence detector in overlapping style 0101 sequence detector in non-overlapping style 1010 sequence detector in non-overlapping style 1010 sequence detector in overlapping style None 19. The data path shown below is of which type of FSMs Moore Mealy None of the above None 20. Following implementation is of a Mealy based Serial adder Moore based Serial adder Mealy based full adder none of the above None 21. Following implementation is of Moore based Serial adder Mealy based serial adder Moore based full adder none of the above None 22. Input/Output sequence of a sequence detector is shown below. Which is correct? FSM - Mealy Type, Sequence - 1010, x - overlapping, y - non-overlapping FSM - Mealy Type, Sequence - 1010, x - non-overlapping, y - overlapping FSM - Moore Type, Sequence - 1010, x - overlapping, y - non-overlapping FSM - Moore Type, Sequence - 1010, x - non-overlapping, y - overlapping None 23. Input/output sequence of sequence detector is shown below. Which statement is correct? FSM - Mealy Type, Sequence - 1110, x - overlapping, y - non-overlapping FSM - Mealy Type, Sequence - 1010, x - non-overlapping, y -overlapping FSM - Moore Type, Sequence - 1010, x - overlapping, y - non-overlapping FSM - Moore Type, Sequence - 1110, x - non-overlapping, y - overlapping None 24. Following figure is a state diagram of a Serial Adder Half Adder Serial Xor Operation None of the above None 25. Following state diagram is of Serial Odd parity check Serial even parity check Square Wave generator None of the above None 26. Following state diagram is of a Mealy based square wave generator Moore based square wave generator Mealy based frequency divider None of the above None 27. Following implementation is a Mealy Machine Moore machine None Please fill in the comment box below. Time's up +10
