Python productivity on Zynq (PYNQ) open-source software framework has paved the way for easy implementation of digital systems on Xilinx system on chip (SoC) devices. This project focuses on image acquisition problem in real-time image processing systems. Nowadays it is preferable to interface camera devices with FPGA boards using the inbuilt processing system (PS) provided
LED and Camera Interfacing with ZYNQ FPGA using PYNQ Read More »
Exponential function is very important to evaluate activation functions (Sigmoid, hyperbolic tangent, SoftMax etc.) used in machine learning (ML) algorithms. Thus, efficient hardware implementation of exponential function very important. In this post, we have discussed detailed FPGA Implementation of Taylor Series Based Exponential function. Many techniques are reported in literature to compute exponential function. Taylor
FPGA Implementation of Taylor Series Based Exponential Read More »
Vivado HLS is designed for high level language synthesis of digital systems. Any system can be modelled using lower-level languages like Verilog HDL, VHDL. But these HDL languages are considered as machine level languages like assembly language in case of microprocessors. High level languages like C, C++ or even python also can be used to
Basic Combinational Blocks using Vivado HLS Read More »
In our previous post, we discussed about general codes for some of the most important combinational blocks. In this post, we will discuss general Verilog codes for some of the most important sequential blocks. General Verilog Codes for Sequential Blocks are important to avoid different codes for different design parameters. General Verilog codes make our
General Verilog Codes for Sequential Blocks Read More »
In our previous blog, we discussed different combinational circuits but General Verilog codes are essential in writing bigger complex codes for a system. They make it easy for the coders to generalize the overall code. The generalized overall code can then be easily tuned for the design parameters. For example, if a designer writes a
General Verilog Codes for Combinational Blocks Read More »
As we discussed in the previous blog one of the methods to solve metastability is the Double Flop Synchroniser method. This method consists of two cascaded D flip-flops that sample the input signal with the destination clock. This design can reduce the risk of metastability by adding a buffer stage between the source and the
Double Flip-Flop Synchronizer for CDC Read More »
Clock Domain Crossing (CDC) refers to the process and techniques used to manage data transfer between different clock domains within the digital system in either ASIC IC or FPGA. CDC is one where the data is transferred from one clock domain to another. A scenario of CDC is shown below in Figure 1. Here, data
Clock Domain Crossing in Digital Circuits Read More »
Artificial Neural Networks (ANN) are very popular to realize different critical functions related to any field of study. In this project, a simple exclusive-OR function is realized with the help of ANN. The purpose of the XOR function is to perform XOR operation between two inputs which can take value anything within the range -1
FPGA Implementation of XOR Function using ANN Read More »
QR decomposition is another powerful technique to solve linear equations. In QR decomposition, the co-efficient matrix need not to be a symmetric matrix. In special cases where the input signal is compressible or sparse, QR decomposition can directly operate on matrix if less than . This way an underdetermined linear system is solved. Matrix is
Solving Linear Equations using QR Decomposition Read More »
Gaussian Elimination (GE) is one of the most popular methods to solve an linear equation. GE algorithm is the only direct method which is of much interest to the researchers. This method considers that the co-efficient matrix is square. If the matrix is not square then it can be made square and symmetric as shown
Solving Linear Equations using Gaussian Elimination Read More »
In our previous tutorial, we have discussed about Cholesky decomposition which is a very important matrix factorization to solve a linear equation. But this technique has some drawbacks which are also discussed in the same tutorial. In this tutorial, we will discuss about modified Cholesky Decomposition which is an alternative version of Cholesky decomposition. This
Solving Linear Equations with Modified Cholesky Decomposition Read More »
Cholesky decomposition is a very important matrix factorization technique which is used to solve a linear equation. This technique originally derives from very popular LU decomposition and very suitable for higher order matrices. In Cholesky decomposition, the co-efficient matrix has to be a symmetric positive definite matrix. But in general, the co-efficient matrix can be
Solving Linear Equations using Cholesky Decomposition Read More »
Singular Value Decomposition (SVD) is one of the matrix factorization techniques which can be used to solve linear equations. But this is not the primary objective of SVD. SVD can provide singular values of matrix. Singular values reveal unique information about a matrix. SVD has many uses in machine learning, image processing etc. Linear equations
SVD Implementation Strategies Read More »
QR decomposition is one of the powerful matrix factorization techniques that is used to solve a linear equation, to find matrix inverse or to find pseudo-inverse. In this factorization technique, a matrix (A) is factorized into two matrices Q and R such that A = QR. Here, Q is an ortho-normal matrix and R is
FPGA Implementation QR Decomposition Based on CORDIC Read More »
Pulse Width Modulation (PWM) signal is used in place of a Digital to Analog Converter (DAC) to simplify the digital-to-analog conversion process. PWM is used when we need to generate analog voltage corresponding to some digital value. PWM is a technique where the width of a pulse is varied. This means the duty cycle of
FPGA Based PWM Signal Generation Read More »
