VLSI Implementation

Static Timing Analysis using Cadence Tempus

In the previous tutorials, we have discussed how to simulate or synthesize a design using Synopsys or Cadence. Static Timing Analysis is a very important step in designing an digital design for ASIC. This tutorial is on performing Static Timing Analysis using Cadence Tempus. 1. Open the terminal 2.   Source the cadence.cshrc 3.   In this …

Static Timing Analysis using Cadence Tempus Read More »

ATPG for Sequential circuits

Automatic Test Pattern Generation and Automatic Test Pattern Generator (ATPG) is an electronic design automation method/technology used to find an input (or test) sequence that, when applied to a digital circuit, enables automatic test equipment to distinguish between the correct circuit behavior and the faulty circuit behavior caused by defects. Earlier we presented a tutorial on ATPG for Combinational Circuits. This tutorial focuses on ATPG for sequential circuits …

ATPG for Sequential circuits Read More »

Code Coverage

Code coverage is a basic coverage type which is collected automatically. It tells you how well your HDL code has been exercised by your test bench. In other words, how thoroughly the design has been executed by the simulator using the tests used in the regression. Functional coverage measures how well the functionality of the …

Code Coverage Read More »

Shopping Basket