Unsigned Array Multiplier

Array multiplier is very popular for multiplication of binary numbers. Array multiplier resembles the pen and paper method of multiplication process. Array multiplication process for two 4-bit unsigned numbers a and b is shown below.

Multiplication of two 4-bit unsigned numbers

On the contrary to the sequential multiplier, array multiplier is parallel. A array of full adders are used for the multiplication process. For n-bit data width, total n(n-1) full adders are used in this multiplier. Carry outputs of a stage is added in the next stage to form a systolic architecture. But in the last stage carry is used in the same stage to reduce hardware. The architecture of the array multiplier is shown below.

Unsigned Array Multiplier

Click here to download the Verilog code

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1 thought on “Unsigned Array Multiplier”

  1. Prakshi Saxena

    you have made it so easy sir :)…this has helped me a lot !!!
    kudos to you :))

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