18-bit Radix 2 Unsigned Binary Divider Verilog Code
Here, a Radix 2 unsigned divider is designed for 18-bit dividend and 18-bit divisor. The Quotient is 18-bit and fraction part is 10-bit. The Verilog implementation of this divider is fully pipelined. This is a complete divider which can be modified according to the application.
Nandan Bose –
searching Verilog code for a unsigned divider but did not find it in the net till i land her. Thanks for the detailed code.