IP to Find Best P Elements and their Indices out of a Serial Stream

$5.00

  1. This IP can find P best data (which has maximum value) from a serial stream.
  2. This IP can find indexes of these P data also.
  3. Data width can be varied.
  4. P is also can be varied.
  5. This IP is insertion sorting algorithm based.
  6. Finding minimum can be possible on user request.

Some times we require a sort block which sorts a serial data stream in ascending or in descending order. For example, we have if we need to find which vector correlates to a particular vector then we need a sort block. All the correlation data are fed to the sort block and the index of the vector which gives maximum correlation is identified.

This IP is capable of sorting a serial data in descending order. It is capable to find maximum of a data stream and it can find index of the data which is maximum. Also, we may need to find P elements of a data stream which are maximum and indices of these P elements. This IP is capable of doing this.

This IP has three parameters which are N (width of the data), M (width of the indexes), and P (Number of elements needed to sorted). For example, we have 1024 data of width 18-bits and we need to find 16 elements which are maximum. Thus in this case, N = 18, M = 10, and P = 16.

Operation of this block is simple. It has two main control signal pulses which are sod (stat of data) and eod (end of data). The pulse sod should be aligned with the first data and signal eod must be aligned with last data. Then automatically, the signal op\_track tracks the sorted elements and their indexes. The outputs  data\_sorted and indx\_sorted are two dimensional arrays of size N\times P and M\times P respectively. This IP has two extra outputs which are data\_rest and add\_rest. This IP sorts P data elements but rest of the data and their indices are output through data\_rest and add\_rest respectively.  This option is provided if user wants to make a sorting processor using this IP.  The signal op\_track can be used to read the rest elements in the case of a sorting processor.

This IP is tested by implementing it on Xilinx XC7A35T-1FTG256 Artix 7 FPGA and the results are verified using Vivado inline logic analyzer. The performance of this IP is shown below in a table

Dynamic power of this IP is measured at frequency of 200 Mhz though more than this frequency is achievable.  Application of this IP is everywhere whether it is machine learning, compressed sensing or image processing.

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